The present invention relates generally to common mode feedback circuits for fully differential amplifiers, and more particularly to common mode feedback circuits which avoid introducing errors into the differential output signal.
All fully differential amplifiers (i.e., differential amplifiers having both differential inputs and a differential outputs) have a common mode feedback circuit. For example, differential amplifier 1A of FIG. 1, which includes a typical differential input transistor pair 2A and a typical folded cascode stage 2B, also includes a common mode feedback circuit 3. The inputs of common mode feedback circuit 3 are coupled to the outputs Vout+ and Vout− of folded-cascode stage 2B, and the output of common mode feedback circuit 3 is fed back via common mode feedback conductor 22 to P-channel current source transistors 15 and 16 of folded cascode stage 2B.
The main requirements of a common mode feedback circuit are to (1) keep the outputs Vout+ and Vout− of the amplifier within a suitable range, (2) to have as little effect as possible on the differential output voltage (Vout+−Vout−), and (3) to keep the output common mode voltage (VCMO) constant. It is important that the output common mode voltage VCMO be kept constant since it affects the differential voltage Vout+−Vout− because of the output characteristics of the differential amplifier itself. (A non-constant VCMO affects the differential output voltage in two ways. First, it affects the linearity of the amplifier, and second, it “moves” and thereby limits the output voltage swing.) Also, VCMO should be constant because if it is not constant and if the CMRR (common mode rejection ratio) of circuitry following the differential amplifier is low, this results in signal errors. Furthermore, the common mode feedback frequently has to operate with large output voltage swings of the differential amplifier. Also, the common mode feedback may need to operate with differential amplifiers having an auto-zero phase and an active amplification phase.
The common mode feedback circuit 3 shown in Prior Art FIG. 1 keeps the outputs in an operational range, but provides very poor control of the output common mode voltage VCMO. Furthermore, common mode feedback circuit 3 of Prior Art FIG. 1 operates effectively only for relatively small swings of the differential output voltage Vout+−Vout−. If the differential output voltage Vout+−Vout− increases, common mode feedback circuit 3 keeps one of the output voltages Vout+ or Vout− approximately constant, and therefore the output common mode voltage VCMO (which is the average of Vout+ and Vout−) varies over a wide range. The output voltage swings are small because if the differential output voltage is large, then one of transistors 23 and 24 is off and therefore has no effect on the common mode feedback control voltage on conductor 22, and therefore only one of the output voltages Vout+ or Vout− controls the common mode feedback control voltage. The common mode feedback control voltage on conductor 22 just follows the lower of Vout+ and Vout−, and therefore does not track to the actual output common mode voltage, i.e., does not track the average of Vout+ and Vout−. Also, variation of the output common mode voltage VCMO of common mode feedback circuit 3 varies significantly with semiconductor processing variables and with circuit temperature.
Another prior art common mode feedback circuit 3A is shown in the differential amplifier 1B of FIG. 2. In this common mode feedback circuit, a tracking circuit 30 includes equal tracking capacitors 31 and 32 and a CMOS transmission gate switch 27 that is controlled by a “phase one” signal PH1 which occurs before normal amplifying, referred to as “phase 2”. PH1 can be an auto-zero signal in a typical case in which an auto-zeroing circuit is connected to output conductors 19 and 20 of folded cascode circuit 2B. The auto-zeroing circuit cross-connects Vin+ to Vout− and Vin− to Vout+ during the auto-zeroing phase, during which time the differential input voltage is very small. Then the resulting differential output voltage is equal to the magnitude of the differential amplifier input offset voltage. Next, switch 27 is closed, which discharges tracking capacitor 32, so the offset voltage appears across tracking capacitor 31. This provides VCM1 as a DC bias point on the gate of a P-channel input transistor 35 of transistor pair 21A which also includes P-channel input transistors 36. Switch 27 when closed also prevents VCM1 from electrically “floating”, i.e., from changing as a result of leakage currents associated with conductor 33. During the amplification phase of operation of differential amplifier 1B, switch 27 is open, and VCM1 therefore is equal to the common mode output voltage of differential amplifier 1B (i.e. to the average value of Vout+ and Vout−).
The gate of input transistor 36 receives the voltage VCM-IN, which is the constant desired common mode output voltage of differential amplifier 1B. VCM-IN may be provided by a reference voltage circuit, for example a voltage divider. The drains of input transistors 35 and 36 are connected to the summing nodes 39 and 40, respectively, of a folded cascode circuit 21B of common mode feedback circuit 3A. Common mode feedback circuit 3A can zero itself during auto-zeroing (i.e., during PH1) and can also track the output differential voltage Vout+−Vout− during the amplifying phase by means of equal tracking capacitors 31 and 32.
Common mode feedback circuit 3A of Prior Art FIG. 2 allows both large Vout+ and Vout− voltage swings of differential amplifier stage 2 and precise control of the output common mode voltage. The main problem of common mode feedback circuit 3A of Prior Art FIG. 2 is that charge is injected on only one of the output voltages (i.e., only on Vout+) by parasitic capacitance of CMOS transmission gate switch 27 when it opens at the end of PH1. The injected charge generates a spike voltage on Vout+. This introduces an error in the output differential voltage Vout+−Vout−. (It should be appreciated that providing an additional switch similar to switch 27 across tracking capacitor 31 to balance the above mentioned charge injection would short-circuit Vout+ and Vout− together, which would be unacceptable because it does not allow input offset correction during this phase.
Thus, there is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and has very little effect on the differential output voltage of the differential amplifier.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and keeps the common mode output voltage constant.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and keeps the common mode output voltage constant and also keeps the amplifier output voltages within a suitable range.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and does not short circuit the differential amplifier outputs during auto-zeroing of the differential amplifier.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and accurately tracks the common mode voltage during both an auto-zeroing phase and an amplification phase.
There also is an unmet need for a common mode feedback circuit which operates effectively with any two-phase fully differential amplifier and precisely controls the output common mode voltage.